1. Field of Invention
The present invention relates to a system for determining the multiple value of clock frequency from system bus. More particularly, the present invention relates to a system capable of automatically reading out the multiple value of clock frequency from system bus.
2. Description of Related Art
There are a number of conventional techniques for selecting the multiple value of clock frequency from PC system bus. The most common technique is to set up a plurality of jumpers on a computer main board. By setting the pin connections of these jumpers manually, the multiple value of clock frequency used by the main board can be adjusted accordingly. One major drawback of this method is that the relationship between the method of interconnecting various pins and the multiple value of clock frequency must be memorized. Otherwise, a user may have to find such information from related documents first before the multiple value of clock frequency can be correctly set. Hence, this type of design is not too user friendly and may cause a lowering of performance.
To resolve the problem, a basic input/output system (BIOS) may be used to provide simple method of selecting clock frequency. The BIOS method utilizes software instead of hardware to control the selection so that the main board may be able to use the correct multiple value of clock frequency. Although the software method can eliminate some of the inconveniences in a manual setting system, imperfections still exist. For example, if the central processing unit (CPU) of a computer is locked up to operate only at a definite clock frequency or locked up to operate only within a range of clock frequencies, the user needs to consult a brochure about the CPU before a multiple value of clock frequency suitable for operating the system can be found.
To facilitate the selection of the multiple value of clock frequency, conventional techniques also provide an automatic selection method. In this method, the CPU provides a storage unit to hold the multiple value of clock frequency used by the CPU. The multiple value of clock frequency is broadcast to outside the system via one of the pins. The chipset responsible for determining the correct clock frequency of the main board is able to find out the correct multiple value of clock frequency by receiving the broadcast from the CPU. FIG. 1 is a block diagram showing a conventional method of automatically finding a multiple value of clock frequency through connections between a CPU and a chipset. As shown in FIG. 1, the multiple clock frequency value is stored in a storage unit 125 inside the CPU 120. Through one of CPU's outlet pins, the multiple value of clock frequency can be transferred from the outlet pin of the CPU 120 via circuit lines 140, 142, 144 and 146 to a chipset 130. Table 1 is a listing of the relationship between multiple values of clock frequency and various combinations of pin potentials.
TABLE 1Multiple valueof ClockFID [3]FID [2]FID [1]FID [0]Frequency0000Retained0001Retained0010Retained00114.50100501015.50110601116.51000710017.5101081011Retained1100Retained1101Retained1110Retained1111Retained
In Table 1, FID [0] to FID [3] represents the pins on the CPU 120. A value of ‘0’ in the corresponding pin indicates a low potential at that pin. Conversely, a value of ‘1’ in the corresponding pin indicates a high potential at that pin. By probing the potentials of all four pins, the multiple value of clock frequency stored inside the storage unit 125 of the CPU 120 can be found.
Although this arrangement is much simpler than the previous two methods, extra pins in the chipset 130 are needed to receive information regarding the multiple value of clock frequency from the CPU 120. Since the chipset needs to provide many other powerful functions, pins are always in demand. Hence, the last method is likely to aggravate chipset's pin shortage problem.
In brief, major defects in conventional techniques includes:
1. The adjustment of the multiple value of clock frequency to be used by the main board through the manual setting of jumpers is not very user-friendly. Operating efficiency is likely to be compromised.
2. Adjustment of the multiple value of clock frequency through software control is convenient. However, the user needs to consult a CPU brochure to set the multiple value of clock frequency for normal operation when the clocking frequency value of the CPU is locked or the CPU is permitted to use only a few frequencies.
3. The method of broadcasting the multiple value of clock frequency from a CPU to a chipset so that the chipset can select the proper operating frequency for the main board is convenient. However, additional pins are required to receive CPU signals, hence aggravating the chipset's pin shortage problem.